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L5050STR Fiches technique(PDF) 17 Page - STMicroelectronics |
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L5050STR Fiches technique(HTML) 17 Page - STMicroelectronics |
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17 / 20 page ![]() DS12548 Rev 3 17/20 L5050S Package information 19 E 5.806.006.20 E1(2) 3.80 3.90 4.00 e1.27 h0.25 0.50 L0.40 1.27 L1 1.04 k0 8 ccc 0.10 1. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both side). 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side. Table 8. SO-8 package mechanical data (continued) Symbol Millimeters Min Typ. Max |
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