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IIS2MDC Fiches technique(PDF) 17 Page - STMicroelectronics |
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IIS2MDC Fiches technique(HTML) 17 Page - STMicroelectronics |
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17 / 40 page ![]() DocID030986 Rev 1 17/40 IIS2MDC Functionality 40 The following table summarizes the turn-on time of the device in the two different power modes with the offset cancellation function enabled or disabled (see Section : Where Current_consumption_in_power_down and Current_consumption_10Hz can be found, respectively, in Table 5 and Table 11.). The IIS2MDC offers single measurement mode in both high-resolution and low-power modes. Single measurement mode is enabled by writing bits MD[1:0] to '01' in CFG_REG_A (60h). In single measurement mode, once the measurement has been performed, the DRDY pin is set to high, data is available in the output register and the IIS2MDC is automatically configured in idle mode by setting the MD[1] bit to '1'. Single measurement is independent of the programmed ODR but depends on the frequency at which the MD[1:0] bits are written by the microcontroller/application processor. Maximum ODR frequency achievable in single mode measurement is given in the following table. In single measurement mode, for ODR < 10 Hz, current consumption can be calculated with the following formula: (Current_consumption_10Hz - Current_consumption_in_power_down) / (10 Hz / ODR) + Current_consumption_in_power_down Where Current_consumption_in_power_down and Current_consumption_10Hz can be found, respectively, in Table 5 and Table 11. Table 12. Operating mode and turn-on time Operating mode Turn-on time CFG_REG_A[LP] CFG_REG_A[OFF_CANC = 0] CFG_REG_A[OFF_CANC = 1] 0 (high-resolution) 9.4 ms 9.4 ms + 1/ODR 1 (low-power) 6.4 ms 6.4 ms + 1/ODR Table 13. Maximum ODR in single measurement mode (HR and LP modes) Maximum ODR Power mode (CFG_REG_A[LP]) 100 Hz High resolution (LP = ‘0’) 150 Hz Low power (LP = ‘1’) |
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