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ASM1233M-5/S Fiches technique(PDF) 3 Page - Alliance Semiconductor Corporation |
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ASM1233M-5/S Fiches technique(HTML) 3 Page - Alliance Semiconductor Corporation |
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3 / 9 page ![]() 3 of 9 Notice: The information in this document is subject to change without notice Low Power, 5V/3.0V, µP Reset, Active LOW, Open-Drain Output ASM1233M rev 1.0 October 2003 Application Information Operation - Power Monitor The ASM1233M detects out-of-tolerance power supply conditions. It resets a processor during power-up, power- down and generates a reset to the system processor when the monitored power supply voltage is below the reset threshold. When an out-of-tolerance VCC voltage is detected, the RESET signal is asserted. On power-up, RESET is kept active (LOW) for approximatley 350ms after the power supply voltage has reached the selected tolerance. This allows the power supply and microprocessor to stablize before RESET is released. tRPU VCCTP (MIN) VOH VCCTP VCCTP (MAX) tR VCC RESET Figure 1: Timing Diagram: Power-Up VCCTP (MIN) VCCTP VCCTP (MAX) tF VCC tRPD VOL RESET Figure 2: Timing Diagram: Power-Down |
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