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IS25LP064A-RHLA3 Fiches technique(PDF) 46 Page - Integrated Silicon Solution, Inc

No de pièce IS25LP064A-RHLA3
Description  3V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  99 Pages
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Fabricant  ISSI [Integrated Silicon Solution, Inc]
Site Internet  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP064A-RHLA3 Fiches technique(HTML) 46 Page - Integrated Silicon Solution, Inc

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IS25LP064A/032A
Integrated Silicon Solution, Inc.- www.issi.com
46
Rev. A
11/06/2015
8.14 WRITE ENABLE OPERATION (WREN, 06h)
The Write Enable (WREN) instruction is used to set the Write Enable Latch (WEL) bit. The WEL bit is reset to
the write-protected state after power-up. The WEL bit must be write enabled before any write operation,
including Sector Erase, Block Erase, Chip Erase, Page Program, Program Information Row, Write Status
Register, and Write Function Register operations. The WEL bit will be reset to the write-protected state
automatically upon completion of a write operation. The WREN instruction is required before any above
operation is executed.
Figure 8.22 Write Enable Sequence
Instruction = 06h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.23 Write Enable QPI Sequence
06h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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