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LPC5410X Fiches technique(PDF) 6 Page - NXP Semiconductors

No de pièce LPC5410X
Description  32-bit ARM Cortex-M4/M0 MCU; 104 kB SRAM; 512 kB flash, 3 x I2C, 2 x SPI, 4 x USART, 32-bit counter/ timers, SCTimer/PWM, 12-bit 5.0 Msamples/sec ADC
PDF  95 Pages
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC5410X Fiches technique(HTML) 6 Page - NXP Semiconductors

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LPC5410x
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 2.11 — 19 September 2019
6 of 95
NXP Semiconductors
LPC5410x
32-bit ARM Cortex-M4/M0+ microcontroller
The LPC5410x LQFP64 package has the following top-side marking:
• First line: LPC5410xJyyy
– x: 2 = dual core (M4, M0+), 1 = single core (M4)
– yyy: flash size
• Second line: BD64
• Third line: xxxxxxxxxxxx
• Fourth line: xxxyywwx[R]z
– yyww: Date code with yy = year and ww = week.
– xR = boot code version and device revision.
The LPC5410x WLCSP49 package has the following top-side marking:
• First line: LPC5410x
– x: 2 = dual core (M4, M0+), 1 = single core (M4)
• Second line: JxxxUK49
– xxx: flash size
• Third line: xxxxxxxx
• Fourth line: xxxyyww
– yyww: Date code with yy = year and ww = week.
• Fifth line: xxxxx
• Sixth line: NXP x[R]z
– xR = boot code version and device revision.
Table 3.
Device revision table
Revision identifier (R)
Revision description
‘1B’
Initial device revision with boot code version 17.1.
‘1C’
Second device revision with boot code version 17.1.



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