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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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AM652X Fiches technique(PDF) 227 Page - Texas Instruments |
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AM652X Fiches technique(HTML) 227 Page - Texas Instruments |
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227 / 277 page  PIF_DATA_IN PRPIF1 SPRSP08_TIMING_PIF_01 PRPIF2 SDx_CLK PRSD2L PRSD3 PRSD4 SPRSP08_TIMING_PRU_08 SDx_D SDx_CLK SPRSP08_TIMING_PRU_07 PRSD2H PRSD2L PRSD4 PRSD3 SDx_D PRSD1 227 AM6548, AM6528, AM6546 AM6526, AM6527 www.ti.com SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019 Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Specifications Copyright © 2017–2019, Texas Instruments Incorporated Figure 5-99. PRU_ICSSG PRU SD_CLK Falling Active Edge Figure 5-100. PRU_ICSSG PRU SD_CLK Rising Active Edge Table 5-95. PRU_ICSSG PRU Timing Requirements - Peripheral Interface Mode NO. PARAMETER DESCRIPTION MIN MAX UNIT PRPIF1 tw(PIF_DATA_INH) Pulse Duration, PIF_DATA_IN High 2 + 0.475×(4×P) (1) ns PRPIF2 tw(PIF_DATA_INL) Pulse Duration, PIF_DATA_IN Low 2 + 0.475×(4×P) (1) ns (1) P = 1x (or TX) clock period, defined by TX_DIV_FACTOR and TX_DIV_FACTOR_FRAC in the CFG_ED_Pn_TXCFG register. Figure 5-101. PRU_ICSSG PRU Peripheral Interface Timing Table 5-96. PRU_ICSSG PRU Switching Characteristics - Peripheral Interface Mode NO. PARAMETER DESCRIPTION MIN MAX UNIT PRPIF1 tc(PIF_CLK) Cycle time, PIF_CLK 30 ns PRPIF2H tw(PIF_DATA_INH) Pulse Duration, PIF_CLK High 0 + 0.475×P (1) ns PRPIF2L tw(PIF_DATA_INL) Pulse Duration, PIF_CLK Low 0 + 0.475×P (1) ns PRPIF3 td(PIF_CLK- PIF_DATA_OUT) Delay time, PIF_CLK fall to PIF_DATA_OUT -5 5 ns PRPIF4 td(PIF_CLK- PIF_DATA_EN) Delay time, PIF_CLK fall to PIF_DATA_EN -5 5 ns |
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