STM32MP151F datasheet(28/253 Pages) STMICROELECTRONICS

28 / 253 page

Functional overview

STM32MP151C/F

28/253

DS12501 Rev 3

external decoupling capacitors to be discharged with different time constants during the

power- down transient phase.

Figure 2. Power-up/down sequence

1. VDDX refers to any power supply among VDDCORE, VDDA, VDDA1V8_REG, , VDDA1V1_REG, VDD3V3_USBHS/FS,

VDDQ_DDR.

3.7.2

Power supply supervisor

The devices have an integrated power-on reset (POR)/ power-down reset (PDR) circuitry

coupled with a Brownout reset (BOR) circuitry:

•

Power-on reset (POR)

The POR supervisor monitors VDD power supply and compares it to a fixed threshold.

The devices remain in reset mode when VDD is below this threshold,

•

Power-down reset (PDR)

The PDR supervisor monitors VDD power supply. A reset is generated when VDD drops

below a fixed threshold.

The PDR supervisor can be enabled/disabled through PDR_ON pin.

•

Brownout reset (BOR)

The BOR supervisor monitors VDD power supply. Three BOR thresholds (from 2.1 to

2.7 V) can be configured through option bytes. A reset is generated when VDD drops

below this threshold.

•

Power-on reset VDDCORE (POR_VDDCORE)

The POR_VDDCORE supervisor monitors VDDCORE power supply and compares it to

a fixed threshold. The VDDCORE domain remain in reset mode when VDDCORE is below

this threshold,

•

Power-down reset VDDCORE (PDR_VDDCORE)

The PDR_VDDCORE supervisor monitors VDDCORE power supply. A VDDCORE domain

reset is generated when VDDCORE drops below a fixed threshold.

The PDR_VDDCORE supervisor can be enabled/disabled through PDR_ON_CORE

pin.

MSv47490V1

0.3

VBOR0

3.6

Operating mode

Power-on

Power-down

time

VDDX

(1)

VDD

Invalid supply area

VDDX < VDD + 300 mV

VDDX independent from VDD

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