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CS5321 Fiches technique(PDF) 28 Page - Cirrus Logic

No de pièce CS5321
Description  24-bit, Variable-bandwidth A/D Converter Chipset
PDF  36 Pages
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Fabricant  CIRRUS [Cirrus Logic]
Site Internet  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5321 Fiches technique(HTML) 28 Page - Cirrus Logic

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CS5321/22
28
DS454F2
2.18 Board Layout Considerations
All of the 0.1
µF filter capacitors on the power sup-
plies, AIN+, and AINR, should be placed very
close to the chip and connect to the nearest ground
pin on the device. The capacitors between VREF+
and VREF- should be located as close to the chip as
possible. The 0.l
µF capacitors on the AIN+ and
AINR pins should be placed with their leads on the
same axis, not side-by-side. If these capacitors are
placed side-by-side their electric fields can interact
and cause increased distortion. The chip should be
surrounded with a ground plane. Trace fill should
be used around the analog input components.



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