GS71024T/U

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.05 11/2004

9/13

© 1999, GSI Technology

Write Cycle 1: WE control

Write Cycle 2: CE control

Address

V/S

WE

Data In

OE

Data Out

Data valid

High impedance

(*2)

(*3)

(*3)

*1 CE1 represents both CE1 low and CE2 high.

*2 Write is executed when both CE1 and WE are at low simultaneously.

*3 Do not apply the data input voltage to the output while DQ pin is in output condition.

Address

V/S

WE

Data In

OE

Data Out

Data valid

High impedance

*1 CE1 represents both CE1 low and CE2 high.