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VSC8504-02 Fiches technique(PDF) 113 Page - Microsemi Corporation |
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VSC8504-02 Fiches technique(HTML) 113 Page - Microsemi Corporation |
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113 / 131 page ![]() Electrical Specifications VMDS-10507 VSC8504-02 Datasheet Revision 4.2 102 Figure 46 • JTAG Interface Timing Diagram Figure 47 • Test Circuit for TDO Disable Time 5.2.11 Serial Management Interface This section contains the AC specifications for the serial management interface (SMI). Table 122 • Serial Management Interface AC Characteristics Parameter Symbol Minimum Typical Maximum Unit Condition MDC frequency(1) fCLK 2.5 12.5 MHz MDC cycle time tCYC 80 400 ns MDC time high tWH 20 50 ns MDC time low tWL 20 50 ns Setup to MDC rising tSU 10 ns Hold from MDC rising tH 10 ns MDC rise time tR 100 tCYC × 10%(1) ns MDC = 0: 1 MHz MDC = 1: MHz – fCLK maximum TCK TDI TMS TDO tH(TDO) tc tW(CH) tW(CL) tSU tH tDIS See definition tV(C) nTRST tW(TL) 5 pF F rom output under test 500 Ω 500 Ω 3.3 V |
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