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GD5F1GQ4REFJS Fiches technique(PDF) 32 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD5F1GQ4REFJS Fiches technique(HTML) 32 Page - GigaDevice Semiconductor (Beijing) Inc. |
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32 / 60 page ![]() SPI(x1/x2/x4) NAND Flash 1G 32 10.3 Program Load x4 (PL x4) (32H) The Program Load x4 command (32H) is similar to the Program Load command (02H) but with the capability to input the data bytes by four pins: SIO0, SIO1, SIO2, and SIO3. The command sequence is shown below. The Quad Enable bit (QE) of feature (B0[0]) must be set to enable the program load x4 command. Figure10-2. Program Load x4 Sequence Diagram Command 0 1 2 3 4 5 6 7 32H CS# SCLK 8 9 10 20 21 22 23 3 2 1 0 15 14 13 24 25 26 27 4 0 28 29 30 31 SI(SIO0) SO(SIO1) WP#(SIO2) HOLD#(SIO3) 5 1 6 2 7 3 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 Byte1 Byte2 CS# SCLK SI(SIO0) SO(SIO1) WP#(SIO2) HOLD#(SIO3) 34 35 36 37 33 38 39 32 42 43 44 45 41 46 47 40 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 Byte11 4 0 5 1 6 2 7 3 Byte12 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 4 0 5 1 6 2 7 3 Byte 2176/2112 Dummy<3:0>, A11-A0 Note: when internal ECC disabled the Byte is 2176, when internal ECC enabled the Byte is 2112. |
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