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AM652X Fiches technique(PDF) 284 Page - Texas Instruments |
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AM652X Fiches technique(HTML) 284 Page - Texas Instruments |
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284 / 299 page ![]() A B MCU_OSPI[x]_CLK R1 OSPI/QSPI/SPI device clock input 0 * Ω OSPI_Board_03 C D MCU_OSPI[x]_DQS OSPI device DQS 284 AM6548, AM6528, AM6546 AM6526, AM6527 SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018 www.ti.com Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Applications, Implementation, and Layout Copyright © 2017–2018, Texas Instruments Incorporated Figure 7-3. OSPI Interface High Level Schematic NOTE *0 Ω resistor (R1), located as close as possible to the MCU_OSPI[x]_CLK pin, is placeholder for fine tuning, if needed. 7.3 High Speed Differential Signal Routing Guidance The High-Speed Interface Layout Guidelines Application Report (SPRAAR7) available from http://www.ti.com/lit/pdf/spraar7 provides guidance for successful routing of the high speed differential signals. This includes PCB stackup and materials guidance as well as routing skew, length and spacing limits. TI supports only designs that follow the board design guidelines contained in the application report. 7.4 USB Design Guidelines The USB 3.1 specification allows the VBUS voltage to be as high as 5.5 V for normal operation, and as high as 20 V when the Power Delivery addendum is supported. Some automotive applications require a max voltage to be 30 V. The AM65xx device requires the VBUS signal voltage be scaled down using an external resistor divider (as shown in the Figure 7-4), which limits the voltage applied to the actual device pin (USB0_VBUS, USB1_VBUS). The tolerance of these external resistors should be equal to or less than 1%, and the leakage current of zener diode at 5 V should be less than 100 nA. |
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