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AM652X Fiches technique(PDF) 222 Page - Texas Instruments

No de pièce AM652X
Description  Sitara Processors
PDF  299 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
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AM652X Fiches technique(HTML) 222 Page - Texas Instruments

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PIF_DATA_IN
PRPIF1
SPRSP08_TIMING_PIF_01
PRPIF2
SDx_CLK
PRSD2L
PRSD3
PRSD4
SPRSP08_TIMING_PRU_08
SDx_D
SDx_CLK
SPRSP08_TIMING_PRU_07
PRSD2H
PRSD2L
PRSD4
PRSD3
SDx_D
PRSD1
222
AM6548, AM6528, AM6546
AM6526, AM6527
SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527
Specifications
Copyright © 2017–2018, Texas Instruments Incorporated
Table 5-98. PRU_ICSSG PRU Timing Requirements - Sigma Delta Mode
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PRSD1
tc(SD_CLK)
Cycle time, SD_CLK
40
ns
PRSD2L
tw(SD_CLKL)
Pulse Duration, SD_CLK Low
20
ns
PRSD2H
tw(SD_CLKH)
Pulse Duration, SD_CLK High
20
ns
PRSD3
tsu(SD_DATA-SD_CLK)
Setup time, SD_DATA valid before SD_CLK active edge
10
ns
PRSD4
th(SD_CLK-SD_DATA)
Hold time, SD_DATA valid before SD_CLK active edge
5
ns
Figure 5-107. PRU_ICSSG PRU SD_CLK Falling Active Edge
Figure 5-108. PRU_ICSSG PRU SD_CLK Rising Active Edge
Table 5-99. PRU_ICSSG PRU Timing Requirements - Peripheral Interface Mode
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PRPIF1 tw(PIF_DATA_INH)
Pulse Duration, PIF_DATA_IN High
2 +
0.475*(4*P)
(1)
ns
PRPIF2 tw(PIF_DATA_INL)
Pulse Duration, PIF_DATA_IN Low
2 +
0.475*(4*P)
(1)
ns
(1) P = 1x (or TX) clock period, defined by TX_DIV_FACTOR and TX_DIV_FACTOR_FRAC in the CFG_ED_Pn_TXCFG register.
Figure 5-109. PRU_ICSSG PRU Peripheral Interface Timing



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