AD9547 datasheet(23/106 Pages) AD

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Data Sheet

AD9547

INPUT/OUTPUT TERMINATION RECOMMENDATIONS

AD9547

HIGH

IMPEDANCE

INPUT

DOWNSTREAM

DEVICE

0.1µF

3.3V LVDS

OUTPUT

Figure 26. AC-Coupled LVDS or LVPECL Output Driver

AD9547

DOWNSTREAM

DEVICE

3.3V

LVPECL-

COMPATIBLE

OUTPUT

Figure 27. DC-Coupled LVDS or LVPECL Output Driver

0.1µF

AD9547

SELF-BIASED

REFERENCE

INPUT

Figure 28. Reference Input

0.1µF

AD9547

SELF-BIASED

SYSCLKx

INPUT

Figure 29. SYSCLKx Input

0.1µF

AD9547

SELF-BIASED

CLKINx

INPUT

Figure 30. CLKINx Input

SYSCLKP

300

Ω

150

Ω

0.1µF

SYSCLKN

AD9547

3.3V

CMOS

TCXO

0.1µF

Figure 31. System Clock Input (SYSCLKP/SYSCLKN) When Using a

TCXO/OCXO with 3.3 V CMOS Output

SYSCLKP

SYSCLKN

AD9547

10MHz TO 50MHz FUNDAMENTAL

AT-CUT CRYSTAL WITH 10pF

LOAD CAPACITANCE (CLOAD)

15pF

0Ω

(OPTIONAL)

NOTES

1. THE RECOMMENDED CLOAD = 10pF IS SHOWN. THE VALUES OF

THE 15pF SHUNT CAPACITORS SHOWN HERE MUST EQUAL

2 × (CLOAD − CSTRAY), WHERE CSTRAY IS TYPICALLY 2pF to 5pF).

THE SERIES RESISTOR CONNECTED TO SYSCLKN IS NORMALLY

NOT REQUIRED, BUT CAN BE USEFUL TO LIMIT THE POWER

DISSIPATED IN THE CRYSTAL.

Figure 32. System Clock Input (XOA/XOB) in Crystal Mode

Rev. G | Page 23 of 106

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