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AD9545BCPZ Fiches technique(PDF) 7 Page - Analog Devices

No de pièce AD9545BCPZ
Description  Quad Input, 10-Output, Dual DPLL/IEEE 1588 1 pps Synchronizer and Jitter Cleaner
PDF  157 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD9545BCPZ Fiches technique(HTML) 7 Page - Analog Devices

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Data Sheet
AD9545
Rev. A | Page 7 of 157
FUNCTIONAL BLOCK DIAGRAM
SYSTEM
CLOCK PLL
STATUS AND
CONTROL PINS
AD9545
TEMPERATURE
SENSOR
SYSTEM CLOCK
COMPENSATION
REFERENCE
SWITCHING
CONTROL
REFERENCE
MONITORS
AUXILIARY
NCOs
AUXILIARY
TDCs
TDC
REFERENCE
INPUTS
NCO
DPLL
DPLL0
PLL
APLL0
VCO
NCO
DPLL
DPLL1
PLL
APLL1
VCO
PLL0
PLL1
DISTRIBUTION
OUTPUTS
DISTRIBUTION
OUTPUTS
÷2
÷Q
÷R
OUT0AP,
OUT0AN,
OUT0BP,
OUT0BN,
OUT0CP,
OUT0CN
OUT1AP,
OUT1AN,
OUT1BP,
OUT1BN
XOA,
XOB
INTERNAL ZERO DELAY
INTERNAL ZERO DELAY
EEPROM
(OPTIONAL)
SYSTEM
CLOCK
DIGITAL
CROSS
POINT
MUX
SERIAL PORT (SPI/I2C)
AND EEPROM
CONTROLLER
M0 TO M6
REFA,
REFAA,
REFB,
REFBB
÷2
÷Q
APLL VCO FREQUENCY RANGE
APLL0: 2424MHz TO 3232MHz
APLL1: 3232MHz TO 4040MHz
SERIAL PORT
Figure 1.



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