ICS854057 datasheet(8/13 Pages) ICST

No de pièce	ICS854057

Description	4:1 OR 2:1 LVDS CLOCK MULTIPLEXER WITH INTERNAL INPUT TERMINATION

PDF	13 Pages

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Fabricant	ICST [Integrated Circuit Systems]

Site Internet	http://www.icst.com

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8 / 13 page

854057AG

www.icst.com/products/hiperclocks.html

REV. A JULY 18, 2005

Integrated

Circuit

Systems, Inc.

ICS854057

4:1 OR 2:1 LVDS CLOCK MULTIPLEXER

WITH

INTERNAL INPUT TERMINATION

APPLICATION INFORMATION

2.5V LVDS DRIVER TERMINATION

Figure 1 shows a typical termination for LVDS driver in charac-

teristic impedance of 100

Ω differential (50Ω single) transmis-

FIGURE 1. TYPICAL LVDS DRIVER TERMINATION

sion line environment. For buffer with multiple LDVS driver, it is

recommended to terminate the unused output.

2.5V

100

LVDS_Driv er

100 Ohm Differiential Transmission Line

PCLK

nPCLK

680

2.5V

Receiver

with

Built-In

50 Ohm

680

FIGURE 2. UNUSED INPUT HANDLING

2.5V DIFFERENTIAL INPUT WITH BUILT-IN 50

Ω TERMINATION UNUSED INPUT HANDLING

To prevent oscillation and to reduce noise, it is recommended to

have pull up and pull down connected to true and complement of

the unused input as shown in

Figure 2.

ICS854057 Fiches technique(PDF) 8 Page - Integrated Circuit Systems