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WM8950 Fiches technique(PDF) 39 Page - Wolfson Microelectronics plc |
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WM8950 Fiches technique(HTML) 39 Page - Wolfson Microelectronics plc |
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39 / 52 page ![]() Preliminary Technical Data WM8950 w PTD Rev 2.1 June 2005 39 SDIN SCLK register address and 1st register data bit DEVICE ADDRESS (7 BITS) RD / WR BIT ACK (LOW) CONTROL BYTE 1 (BITS 15 TO 8) CONTROL BYTE 1 (BITS 7 TO 0) remaining 8 bits of register data STOP START ACK (LOW) ACK (LOW) Figure 25 2-Wire Serial Control Interface In 2-wire mode the WM8950 has a fixed device address, 0011010. RESETTING THE CHIP The WM8950 can be reset by performing a write of any value to the software reset register (address 0 hex). This will cause all register values to be reset to their default values. In addition to this there is a Power-On Reset (POR) circuit which ensures that the registers are set to default when the device is powered up. POWER SUPPLIES The WM8950 can use up to three separate power supplies: AVDD, AVDD2, AGND and AGND2: Analogue supply, powers all analogue functions. AVDD can range from 2.5V to 3.6V and has the most significant impact on overall power consumption. A large AVDD slightly improves audio quality. DCVDD: Digital core supply, powers all digital functions except the audio and control interfaces. DCVDD can range from 1.71V to 3.6V, and has no effect on audio quality. The return path for DCVDD is DGND, which is shared with DBVDD. DBVDD Can range from 1.71V to 3.6V. DBVDD return path is through DGND. It is possible to use the same supply voltage for all supplies. However, digital and analogue supplies should be routed and decoupled separately on the PCB to keep digital switching noise out of the analogue signal paths. POWER MANAGEMENT SAVING POWER BY REDUCING OVERSAMPLING RATE The default mode of operation of the ADC digital filters is in 64x oversampling mode. Under the control of ADCOSR the oversampling rate may be doubled. 64x oversampling results in a slight decrease in noise performance compared to 128x but lowers the power consumption of the device. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R14 ADC control 3 ADCOSR128 0 ADC oversample rate select 0 = 64x (lowest power) 1 = 128x (best SNR) Table 34 ADC Oversampling Rate Selection VMID The analogue circuitry will not work unless VMID is enabled (VMIDSEL 00). The impedance of the VMID resistor string, together with the decoupling capacitor on the VMID pin will determine the startup time of the VMID circuit. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1 Power management 1 1:0 VMIDSEL 00 Reference string impedance to VMID pin (detemines startup time): 00=off (open circuit) 01=75kΩ 10=300kΩ 11=2.5kΩ (for fastest startup) Table 35 VMID Impedance Control |
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