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STW81100ATR Fiches technique(PDF) 20 Page - STMicroelectronics |
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STW81100ATR Fiches technique(HTML) 20 Page - STMicroelectronics |
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20 / 23 page ![]() STW81100 20/23 Table 24. READ-ONLY REGISTER This register is automatically addressed in the ‘current byte address read mode’. ILLEGAL_SUBADD: gives “1” if the sub-address value is not correct ENDCALB: at “0” means end of auto-calibration phase LOCK_DET: “1” when PLL is locked INTCAL[4:0]: internal value of the VCO control word Figure 23. Application Diagram b7 b6 b5 b4 b3 b2 b1 b0 ILLEG AL_SUBAD0 END CALB LOCK_DET INT CAL4 INT CAL3 INT CAL2 INT CAL1 INT CAL0 EXT VCO BUFF EXT LO VCTRL ICP REXT REF_IN LO_OUT 50 Ω OUTBUFN OUTBUFP DIV4 BUF DIV2 BUF EXTVCO_INP EXTVCO_INN CHARGE PUMP BUF |
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