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ADRF6510ACPZ-R7 Fiches technique(PDF) 5 Page - Analog Devices |
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ADRF6510ACPZ-R7 Fiches technique(HTML) 5 Page - Analog Devices |
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5 / 32 page ![]() Data Sheet ADRF6510 Rev. B | Page 5 of 32 TIMING DIAGRAMS WRITE BIT MSB - 2 LSB + 1 LSB NOTES 1. THE FIRST DATA BIT DETERMINES WHETHER THE PART IS WRITING TO OR READING FROM THE INTERNAL CORNER FREQUENCY WORD REGISTER. FOR A WRITE OPERATION, THE FIRST BIT SHOULD BEA LOGIC 1. THE CORNER FREQUENCY WORD BIT IS THEN REGISTERED INTO THE DATA PIN ON CONSECUTIVE RISING EDGES OF THE CLOCK. CLK LE DATA MSB – 2 MSB – 1 MSB tPW tLH tCLK tLS tDS tDH Figure 2. Write Mode Timing Diagram DC DC READ BIT DC DC DC LSB + 1 LSB DATA SDO NOTES 1. THE FIRST DATA BIT DETERMINES WHETHER THE PART IS WRITING TO OR READING FROM THE INTERNAL CORNER FREQUENCY WORD REGISTER. FOR A READ OPERATION, THE FIRST BIT SHOULD BE A LOGIC 0. THE CORNER FREQUENCY WORD BIT IS THEN UPDATED AT THE SDO PIN ON CONSECUTIVE FALLING EDGES OF THE CLOCK. MSB – 2 MSB – 1 MSB tDS tDH CLK LE tPW tCLK tD tLS Figure 3. Read Mode Timing Diagram |
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