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ISL78310 Fiches technique(PDF) 2 Page - Renesas Technology Corp |
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ISL78310 Fiches technique(HTML) 2 Page - Renesas Technology Corp |
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2 / 14 page ![]() ISL78310 FN7810 Rev 2.00 Page 2 of 14 November 7, 2014 Pin Descriptions PIN # PIN NAME DESCRIPTION 1, 2 VOUT Regulated output voltage. A minimum 10µF X5R/X7R output capacitor is required for stability. See “External Capacitor Requirements” on page 9 for more details. 3 SENSE/ADJ For internally fixed VOUT option, this pin provides output voltage feedback. By connecting this pin to the output rail at the load, small voltage drops caused by PCB trace resistance can be eliminated. For the adjustable output voltage option, this pin is connected to the feedback resistor divider and provides voltage feedback signals for the LDO to set the output voltage. 4 PG This is an open drain logic output used to indicate the status of the output voltage. Logic low indicates VOUT is not in regulation. Must be grounded if not used. 5GND Ground. 6 SS External capacitor on this pin adjusts start-up ramp and controls in-rush current. 7 ENABLE VIN independent chip enable. TTL and CMOS compatible. 8 NC Do not connect this pin to ground or supply. Leave floating. 9, 10 VIN Input supply pin. A minimum 10µF X5R/X7R input capacitor is required for stability. See “External Capacitor Requirements” on page 9 for more details. EPAD EPAD at ground potential. Soldering it directly to GND plane is required for thermal considerations. See “Heatsinking the DFN Package” on page 12 for more details. Ordering Information PART NUMBER (Notes 1, 3, 4) PART MARKING VOUT VOLTAGE (Note 2) TEMP RANGE (°C) PACKAGE (Pb-Free) PKG DWG. # ISL78310ARAJZ DZAE ADJ -40 to +125 10 Ld 3x3 DFN L10.3x3 NOTES: 1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. For other output voltages, contact Intersil Marketing. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. For Moisture Sensitivity Level (MSL), please see device information page for ISL78310. For more information on MSL please see techbrief TB363. |
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