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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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ADL5534ACPZ-R7 Fiches technique(PDF) 13 Page - Analog Devices |
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ADL5534ACPZ-R7 Fiches technique(HTML) 13 Page - Analog Devices |
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13 / 16 page  Data Sheet ADL5534 Rev. B | Page 13 of 16 SOLDERING INFORMATION AND RECOMMENDED PCB LAND PATTERN Figure 23 shows the recommended land pattern for ADL5534. To minimize thermal impedance, the exposed paddle on the package underside should be soldered down to a ground plane. If multiple ground layers exist, they should be stitched together using vias. Pin 1 to Pin 4, Pin 6, Pin 9 to Pin 11, and Pin 14 to Pin 15 can be left unconnected, or can be connected to ground. Connecting these pins to ground improves device-to-device isolation and slightly enhances thermal impedance. For more information on land pattern design and layout, refer to the AN-772 Application Note, A Design and Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP). 4.8mm 2.4mm 3.1mm 0.8mm 0.2mm Figure 23. Recommended Land Pattern |
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