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VSC8061 Fiches technique(PDF) 13 Page - Vitesse Semiconductor Corporation |
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VSC8061 Fiches technique(HTML) 13 Page - Vitesse Semiconductor Corporation |
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13 / 20 page ![]() VITESSE SEMICONDUCTOR CORPORATION G52069-0, Rev 4.3 Page 13 05/11/01 © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com Internet: www.vitesse.com Data Sheet VSC8061/VSC8062 Multiplexer/Demultiplexer Chipset 2.5Gb/s 16-Bit Table 8: VSC8062 Pin Identifications NOTE: (1) Can be used single-ended. Pin Number QH Package Pin Number F Package Signal Name I/O Level Description 48 21 CLK I HS High-speed clock, true(1) 47 20 CLKN I HS High-speed clock, complement(1) 44 17 DI I HS Serial data input, true(1) 45 19 DIN I HS Serial data input, complement(1) 31 8 CLK16 O ECL Parallel data clock (high-speed clock divide-by- 16), true 30 6 CLK16N O ECL Parallel data clock (high-speed clock divide-by- 16), complement 8-11, 15-20, 22-25, 28, 29 3, 5, 31, 32, 34, 35, 39-42, 44, 45, 47, 48, 50, 51 D[0:15] O ECL Parallel data outputs 1, 12, 27, 39, 51 4, 10, 18, 30, 36, 43, 49 VCC Pwr Most positive power supply 2, 5, 13, 14, 21, 26, 35 7, 46 VTT Pwr DCFL negative power supply 36, 42, 43, 46, 49 33 VEE Pwr SCFL negative power supply 3, 6, 32-34, 37, 38, 40, 41, 50 1, 2, 9, 11-16, 22, 24-27, 37, 38, 52 NC Do not connect, leave open 4, 7 28, 29 Test Pwr Test inputs. Used in factory for testing, connect to VTT through a resistor 52 23 VEE* Pwr Heat sink bias, connect to VEE |
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