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TDA7333 Fiches technique(PDF) 16 Page - STMicroelectronics

No de pièce TDA7333
Description  RDS/RBDS PROCESSOR
PDF  21 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

TDA7333 Fiches technique(HTML) 16 Page - STMicroelectronics

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8.2 Read transfer
Figure 13. I2C read transfer
Eight bytes can be read at a time (please refer to the to the pages ??? to ??? for the meaning of each bit).
The master has always the possibility to read less than eight registers by not sending the acknowledge bit
and then generating a stop condition after having read the needed amount of registers.
There are two typical read access :
– read only the first register rds_int to check the interrupt bit.
– read the first five registers rds_int, rds_qu, rds_corrp, rds_bd_h, rds_bd_l to get the RDS data
The registers are read in the following order : rds_int, rds_qu, rds_corrp, rds_bd_h,rds_bd_l, rds_bd_ctrl,
sinc4reg, testreg.
Figure 14. I2C read access example 1: read of 5 bytes
Figure 15. I2C read access example 2: read of 1 byte
R
S
S lave addre ss
rd s_ in t
A
rd s_qu
A
A
te stre g
A
P
from master to slave
from slave to master
S = start condition
Slave address = 001000S ( where S is the level of the pin
SA_DATAOUT)
A = acknowledge bit
P = stop condition
R = read mode
S
SDA
SCL
START
CONDITION
RACK
rds_int[7:0]
rds_qu[7:0]
ACK
ACK
SA
CSN1
0
SLAVE ADDRESS
rds_corrp[7:0]
rds_bd_h[7:0]
rds_bd_l[7:0]
P
STOP
CONDITION
ACK
ACK
ACK
S
SDA
SCL
START
CONDITION
RACK
rds_int[7:0]
SA
CSN 1
0
SLAVE ADDRESS
P
STOP
CONDITION
ACK



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