GENERAL DESCRIPTION
The AD9252 is an octal, 14-bit, 50 MSPS ADC with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. Operating at a conversion rate of up to 50 MSPS, it is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.

FEATURES
    8 analog-to-digital converters (ADCs) integrated into 1 package
    93.5 mW ADC power per channel at 50 MSPS
    SNR = 73 dB (to Nyquist)
    ENOB = 12 bits
    SFDR = 84 dBc (to Nyquist)
    Excellent linearity DNL = ±0.4 LSB (typical); INL = ±1.5 LSB (typical)
    Serial LVDS (ANSI-644, default) Low power, reduced signal option (similar to IEEE 1596.3)
    Data and frame clock outputs
    325 MHz, full-power analog bandwidth
    2 V p-p input voltage range
    1.8 V supply operation
    Serial port control
        Full-chip and individual-channel power-down modes
        Flexible bit orientation
        Built-in and custom digital test pattern generation
        Programmable clock and data alignment
        Programmable output resolution
        Standby mode

APPLICATIONS
    Medical imaging and nondestructive ultrasound
    Portable ultrasound and digital beam-forming systems
    Quadrature radio receivers
    Diversity radio receivers
    Tape drives
    Optical networking
    Test equipment