Introduction
The MC68HC11ED0 is a low-cost member of the M68HC11 Family of microcontrollers (MCU). This MCU has a multiplexed address/data bus and is characterized by high speed and low-power consumption. The fully static design allows operation at frequencies from 3 MHz to dc.
Pin count is minimized for cost-sensitive applications. Because there is no on-chip read-only memory (ROM), this device is optimized for expanded-bus systems. On-chip serial peripheral interface (SPI) and serial communications interface (SCI) provide a convenient means or transferring data to and from internal random-access memory (RAM).

Features
Features include:
• M68HC11 CPU
• Power-saving stop and wait modes
• 512 bytes of RAM
• Multiplexed address and data buses
• Enhanced 16-bit timer with 4-stage programmable prescaler
   – Three input capture (IC) channels
   – Four output compare (OC) channels
   – One additional channel, selectable as fourth IC or fifth OC
• 8-bit pulse accumulator
• Real-time interrupt circuit
• Computer operating properly (COP) watchdog
• Clock monitor
• Enhanced asynchronous non-return-to-zero (NRZ) SCI
• Enhanced SPI
• Eight bidirectional input/output (I/O) lines
• Three input-only lines
• Three output-only lines (one output-only line in 40-pin package)
• Packaging options:
   – 44-pin plastic-leaded chip carrier (PLCC)
   – 44-pin quad flat pack (QFP)
   – 40-pin plastic dual in-line package (DIP)