Ultra-Low Power Technology
 2.0 to 5.5 V operation from a single supply
 Stop (RAM retained): 0.56 μA
 Operating: 46 μA /MHz
RL78-S1 Core
 Instruction execution: 78 % of instructions can be
executed in 1 to 2 clock cycles
 CISC architecture (Harvard) with 3-stage pipeline
 Multiply: 8 x 8 to 16-bit result in 2 clock cycles
 16-bit barrel shifter for shift & rotate in 2 clock cycle
 1-wire on-chip debug function
Main Flash Memory
 Density: 1 to 4 Kbyte
 Flash memory rewritable voltage: 4.5 to 5.5 V
RAM
 128 to 512 Byte size options
 Supports operands or instructions
 Back-up retention in all modes
High-speed On-chip Oscillator
 20 MHz with +/-2 % accuracy over voltage (2.0 to
5.5 V) and temperature (-20 to +85°C)
 Pre-configured settings: 20 MHz, 10 MHz, 5 MHz,
2.5 MHz, and 1.25 MHz
Reset and Supply Management
 Selectable power-on reset (SPOR) generator
with 4 setting options
Multiple Communication Interfaces
 1 x I2C master
 1 x I2C multi-master (only for 16-pin product)
 1 x UART (7-, 8-bit)
 Up to 2 x Simplified SPI (CSI Note) (7-, 8-bit)