▪ Close-in phase noise complies with Common Public Radio
Interface (CPRI) frequency synchronization requirements
▪ Supports all ITU-T G.709 frequencies
▪ Meets OTN jitter and wander requirements per ITU-T G.8251
▪ Four independent timing channels
• Each can act as a frequency synthesizer, jitter attenuator,
Digitally Controlled Oscillator (DCO), or Digital Phase Lock
Loop (DPLL)
• DPLL Digital Loop Filters (DLFs) are programmable with cut
off frequencies from 1.1Hz to 22kHz
• Generates output frequencies that are independent of input
frequencies via a Fractional Output Divider (FOD)
• Each FOD supports output phase tuning with 50ps
resolution
▪ Four differential / eight LVCMOS outputs
• Frequencies from 0.5Hz to 1GHz (250MHz for LVCMOS)
• Jitter below 150fs RMS (10kHz to 20MHz)
• LVCMOS, LVDS, LVPECL, HCSL, CML, SSTL, and HSTL
output modes supported
• Differential output swing is selectable: 400mV / 650mV /
800mV / 910mV
• Independent output voltages of 3.3V, 2.5V, or 1.8V
▪ LVCMOS additionally supports 1.5V or 1.2V
• The clock phase of each output is individually programmable
in 1ns to 2ns steps with a total range of ±180°