Features
 AEC-Q100 qualified
 Six integrated fully protected 0.09  half
bridges
 Integrated half bridges can be fully
independent or paralleled up to three in parallel
 Two levels of standby
– Standby (SPI initiated)
– Sleep (VDD=0 V)
 Very low current consumption in standby
– Only wake-up circuit active
 High level of programmability
– On-time duration
– Direction
– Current level
– Off-state fault detection
 2 external half bridge controllers (using
external N-channel MOSFETs or Smart Power
devices)
 External half bridges protected by drain source
monitoring and off-state fault detection
 2 stage charge pump for low voltage operation
 PWM current regulation up to 25 kHz
 4 MHz 24 bit SPI interface for control and
diagnostics
 Output enable for high security
 High level diagnostics
 10 bit digital current feedback (via SPI) for load
integrity check
 Thermal warning and shutdown protection
 Reverse battery protection using an external 
N-Ch MOSFET.
 TQFP64L exposed pad package