Features
• Acceptance tested to 50krad(Si) (LDR) wafer-by-wafer
• ±1% reference voltage over line, temperature, and radiation
• Integrated MOSFETs 31mΩPFET/21mΩ NFET
- 95% peak efficiency
• Externally adjustable loop compensation
• Supports DDR applications (VTT tracks VDDQ/2)
- Buffer amplifier for generating VREF voltage
- 3A current sinking capability
• Grounded lid eliminates charge build up
• IMON pin for output current monitoring
• Adjustable analog soft-start
• Diode emulation for increased efficiency at light loads
• 500kHz or 300kHz operating frequency synch wording
• Monotonic start-up into prebiased load
• Full military temperature range operation
- TA = -55°C to +125°C
- TJ = -55°C to +150°C
• Radiation tolerance
- High dose rate (50-300rad(Si)/s). . . . . . . . . . . 100krad(Si)
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . 100krad(Si)*
* Limit established by characterization.
• SEE hardness
- SEB and SEL LETTH . . . . . . . . . . . . . . . . 86.4MeV•cm2/mg
- SET at LET 86.4MeV•cm2/mg . . . . . . . . . . . < ±3% ΔVOUT
- SEFI LETTH . . . . . . . . . . . . . . . . . . . . . . . . . 60MeV•cm2/mg
• Electrically screened to DLA SMD 5962-14203