Features
• 12-output LVCMOS PLL clock generator
• 2.5 V and 3.3 V compatible
• IDCS - on-chip intelligent dynamic clock switch
• Automatically detects clock failure
• Smooth output phase transition during clock failover switch
• 7.5 – 200 MHz output frequency range
• LVCMOS compatible inputs and outputs
• External feedback enables zero-delay configurations
• Supports networking, telecommunications and computer applications
• Output enable/disable and static test mode (PLL bypass)
• Low skew characteristics: maximum 50 ps output-to-output (within bank)
• 48-lead LQFP package, Pb-free
• Ambient operating temperature range of -40 to 85C
• For functional replacement use 87973