Features
• Single 1.65 V - 3.6 V supply
• Serial Peripheral Interface (SPI) compatible
• Supports SPI modes 0 and 3
• Supports RapidS™ operation
• Continuous read capability through entire array
• Up to 85 MHz
• Low-power read option up to 15 MHz
• Clock-to-output time (tV) of 6 ns maximum
• User-configurable page size
• 256 bytes per page
• 264 bytes per page (default)
• Page size can be factory pre-configured for 256 bytes
• One SRAM data buffer (256/264 bytes)
• Flexible programming options
• Byte/Page Program (1 to 256/264 bytes) directly into main memory
• Buffer Write
• Buffer to Main Memory Page Program
• Flexible erase options
• Page Erase (256/264 bytes)
• Block Erase (2 kB)
• Sector Erase (32 kB)
• Chip Erase (2 Mbits)
• Program and Erase Suspend/Resume
• Advanced hardware and software data protection features
• Individual sector protection
• Individual sector lockdown to make any sector permanently read-only
• 128-byte, One-Time Programmable (OTP) Security Register
• 64 bytes factory programmed with a unique identifier
• 64 bytes user programmable
• Hardware and software controlled reset options
• JEDEC Standard Manufacturer and Device ID Read
• Low power dissipation
• 200 nA Ultra-Deep Power-Down current (typical)
• 3 µA Deep Power-Down current (typical)
• 25 µA Standby current (typical @ 20 MHz)
• 4.5 mA Active Read current (typical))
• Endurance: 100,000 program/erase cycles per page minimum
• Data retention: 20 years
• Complies with full industrial temperature range
• Green (Pb/Halide-free/RoHS compliant) packaging options
• 8-lead SOIC (0.150" wide and 0.208" wide)
• 8-pad Ultra-thin DFN (5 x 6 x 0.6 mm)
• 8-ball (6 x 4 Array) Wafer Level Chip Scale Package
• Die in Wafer Form

1. Description
The AT45DB021E is a 1.65 V minimum, serial-interface sequential access Flash memory is ideally suited for a
wide variety of digital voice, image, program code, and data storage applications. The AT45DB021E also supports
the RapidS serial interface for applications requiring very high speed operation. Its 2,162,688 bits of memory are
organized as 1,024 pages of 256 bytes or 264 bytes each. In addition to the main memory, AT45DB021E also
contains one SRAM buffer of 256/264 bytes. The Buffer can be used as additional system scratch memory, and
E2PROM emulation (bit or byte alterability) can be easily handled with a self-contained three step read-modifywrite operation.
Unlike conventional Flash memories that are accessed randomly with multiple address lines and a parallel
interface, the AT45DB021E uses a serial interface to sequentially access its data. The simple sequential access
dramatically reduces active pin count, facilitates simplified hardware layout, increases system reliability, minimizes
switching noise, and reduces package size. The device is optimized for use in many commercial and industrial
applications where high-density, low-pin count, low-voltage, and low-power are essential.
To allow for simple in-system re-programmability, AT45DB021E does not require high input voltages for
programming. The device operates from a single 1.65 V to 3.6 V power supply for the erase and program and
read operations. The AT45DB021E is enabled through the Chip Select pin (CS) and accessed through a threewire interface consisting of the Serial Input (SI), Serial Output (SO), and the Serial Clock (SCK).
All programming and erase cycles are self-timed.