GENERAL DESCRIPTION
The ADG3123 is an 8-channel, noninverting CMOS to high voltage level translator. Fabricated on an enhanced LC2MOS process, the device is capable of operating at high supply voltages while maintaining ultralow power consumption.
The internal architecture of the device ensures compatibility with logic circuits running from supply voltages within the 2.3 V to 5.5 V range. The voltages applied to Pin VDDA, Pin VDDB, and Pin VSS set the logic levels available at the outputs on the Y side of the device. Pin VDDA and Pin VDDB set the high output level for Pin Y1 to Pin Y6 and for Pin Y7 to Pin Y8, respectively. The VSS pin sets the low output level for all channels. The ADG3123 can provide output voltages levels down to −24.2 V for a low input level and up to +35 V for a high input logic level. For proper operation, VDDB must always be greater than or equal to VDDA and the voltage between the Pin VDDB and Pin VSS should not exceed 35 V.
The low output impedance of the channels guarantees fast rise and fall times even for significant capacitive loads. This feature, combined with low propagation delay and low power consumption, makes the ADG3123 an ideal driver for TFT-LCD panel applications.
The ADG3123 is guaranteed to operate over the −40°C to +85°C temperature range and is available in a compact, 20-lead TSSOP, Pb-free package.

FEATURES
2.3 V to 5.5 V input voltage range
Output voltage levels (VDDA and VDDB to VSS ≤ 35 V)
Low output voltage levels: down to −24.2 V
High output voltage levels: up to +35 V
Rise/fall time: 12 ns/19.5 ns typical
Propagation delay: 80 ns typical
Operating frequency: 100 kHz typical
Ultralow quiescent current: 65 μA typical
20-lead, Pb-free, TSSOP package

APPLICATIONS
Low voltage to high voltage translation
TFT-LCD panels
Piezoelectric motor drivers