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ST72325AR7-Auto Fiches technique(PDF) 202 Page - STMicroelectronics |
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ST72325AR7-Auto Fiches technique(HTML) 202 Page - STMicroelectronics |
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202 / 243 page ![]() Obsolete Product(s) - Obsolete Product(s) Electrical characteristics ST72325xxx-Auto 202/243 Doc ID 13770 Rev 3 19.6.2 Flash memory Warning: Do not connect 12V to VPP before VDD is powered on, as this may damage the device. Table 123. Dual voltage HDFlash memory Symbol Parameter Conditions Min(1) 1. Data based on characterization results, not tested in production Typ Max(1) Unit fCPU Operating frequency Read mode 0 8 MHz Write / Erase mode 1 8 VPP Programming voltage(2) 2. VPP must be applied only during the programming or erasing operation and not permanently for reliability reasons. 4.5V < VDD < 5.5V 11.4 12.6 V IDD Supply current(3) 3. Data based on simulation results, not tested in production Run mode (fCPU = 4 MHz) 3 mA Write / Erase 0 Power down mode / HALT 1 10 µA IPP VPP current (3) Read (VPP = 12V) 200 Write / Erase 30 mA tVPP Internal VPP stabilization time 10 µs tRET Data retention TA =55°C 20 years NRW Write erase cycles TA = 85°C 100 cycles TPROG TERASE Programming or erasing temperature range -40 25 85 °C |
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