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DSPIC33FJ06GS101TE/ML Fiches technique(PDF) 248 Page - Microchip Technology

No de pièce DSPIC33FJ06GS101TE/ML
Description  High-Performance, 16-bit Digital Signal Controllers
PDF  346 Pages
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Fabricant  MICROCHIP [Microchip Technology]
Site Internet  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33FJ06GS101TE/ML Fiches technique(HTML) 248 Page - Microchip Technology

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dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
DS70318D-page 246
Preliminary
© 2009 Microchip Technology Inc.
bit 4
ASYNCSAMP:
Asynchronous Dedicated S&H Sampling Enable bit(1)
1
= The dedicated S&H is constantly sampling and then terminates sampling as soon as the trigger
pulse is detected.
0
= The dedicated S&H starts sampling when the trigger event is detected and completes the sampling
process in two ADC clock cycles.
bit 3
Unimplemented:
Read as ‘0’
bit 2-0
ADCS<2:0>:
A/D Conversion Clock Divider Select bits(1)
111
= FADC/8
110
= FADC/7
101
= FADC/6
100
= FADC/5
011
= FADC/4 (default)
010
= FADC/3
001
= FADC/2
000
= FADC/1
REGISTER 19-1:
ADCON: A/D CONTROL REGISTER (CONTINUED)
Note 1:
This control bit can only be changed while ADC is disabled (ADON = 0), and only applies to single SAR
devices.



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