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SPC564L54L5 Fiches technique(PDF) 134 Page - STMicroelectronics |
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SPC564L54L5 Fiches technique(HTML) 134 Page - STMicroelectronics |
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134 / 160 page ![]() Electrical characteristics SPC56XL60/54 134/160 Doc ID 15457 Rev 8 Figure 26. Nexus output timing Figure 27. Nexus EVTI Input Pulse Width 9 tNTDIH, tNTMSH D TDI, TMS Data Hold Time 5 — ns 10 tJOV D TCK Low to TDO/RDY Data Valid 0 25 ns 1. JTAG specifications in this table apply when used for debug functionality. All Nexus timing relative to MCKO is measured from 50% of MCKO and 50% of the respective signal. 2. For all Nexus modes except DDR mode, MDO, MSEO, and EVTO data is held valid until next MCKO low cycle. 3. The system clock frequency needs to be four times faster than the TCK frequency. Table 38. Nexus debug port timing(1) (continued) No. Symbol Parameter Conditions Min Max Unit 1 2 MCKO MDO MSEO EVTO Output Data Valid 3 5 4 EVTI |
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