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DAC811 Fiches technique(PDF) 3 Page - Texas Instruments

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No de pièce DAC811
Description  Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

DAC811 Fiches technique(HTML) 3 Page - Texas Instruments

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3
®
DAC811
MINIMUM
RELATIVE
DIFFERENTIAL
PACKAGE
SPECIFICATION
ACCURACY
LINEARITY
DRAWING
TEMPERATURE
ORDERING
TRANSPORT
PRODUCT
(LSB)
(LSB)
PACKAGE
NUMBER
RANGE
NUMBER(1)
MEDIA
DAC811AH
±1/2 LSB
3/4
CERDIP-28
149
–25
°C to +85°C
DAC811AH
Rails
DAC811JP
±1/2 LSB
3/4
DIP-28
215
0
°C to +70°C
DAC811JP
Rails
DAC811JU
±1/2 LSB
3/4
SO-28
217
0
°C to +70°C
DAC811JU
Rails
""
"
"
"
"
DAC811JU/1K
Tape and Reel
DAC811KP
±1/4 LSB
1/2
DIP-28
215
0
°C to +70°C
DAC811KP
Rails
DAC811KU
±1/4 LSB
1/2
SO-28
217
0
°C to +70°C
DAC811KU
Rails
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces
of “DAC811JU/1K” will get a single 1000-piece Tape and Reel.
+VCC ................................................................................................................................ 0 to +18V
–VCC to ACOM .......................................................................... 0 to –18V
VDD to DCOM .............................................................................. 0 to +7V
VDD to ACOM ...................................................................................... ±7V
ACOM to DCOM ..................................................................................
±7V
Digital Inputs (Pins 2–14, 16–19) to DCOM ...................... –0.4V to +18V
External Voltage Applied to 10V Range Resistor ............................
±12V
Ref Out ............................................................. Indefinite Short to ACOM
External Voltage Applied to DAC Output ................................ –5V to +5V
Power Dissipation ........................................................................ 1000mW
Lead Temperature (soldering, 10s) ............................................... +300
°C
Max Junction Temperature ............................................................ +165
°C
Thermal Resistance,
θ
J-A: Plastic DIP and SOIC ....................... 100°C/W
Ceramic DIP .................................................................................. 65
°C/W
NOTE: Stresses above those listed above may cause permanent damage to
the device. Exposure to absolute maximum conditions for extended periods
may affect device reliability.
PIN DESCRIPTIONS
ABSOLUTE MAXIMUM RATINGS
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
PIN
NAME
FUNCTION
1+VDD
Logic supply, +5V.
2
WR
Write, command signal to load latches. Logic low
loads latches.
3
LDAC
Load D/A converter, enables WR to load the D/A
latch. Logic low enables.
4NA
Nibble A, enables WR to load input latch A (the
most significant nibble). Logic low enables.
5NB
Nibble B, enables WR to load input latch B. Logic
low enables.
6NC
Nibble C, enables WR to load input latch C (the
least significant nibble). Logic low enables.
7D11
Data bit 12, MSB, positive true.
8D10
Data bit 11.
9D9
Data bit 10.
10
D8
Data bit 9.
11
D7
Data bit 8.
12
D6
Data bit 7.
13
D5
Data bit 6.
14
D4
Data bit 5.
15
DCOM
Digital common, VDD supply return.
16
D0
Data bit 1, LSB.
17
D1
Data bit 2.
18
D2
Data bit 3.
19
D3
Data bit 4.
20
+VCC
Analog supply input, +15V or +12V.
21
–VCC
Analog supply input, –15V or –12V.
22
Gain Adj
To externally adjust gain.
23
ACOM
Analog common,
±V
CC supply return.
24
VOUT
D/A converter voltage output.
25
10V Range
Connect to pin 24 for 10V range.
26
SJ
Summing junction of output amplifier.
27
BPO
Bipolar offset. Connect to pin 26 for bipolar
operation.
28
Ref Out
6.3V reference output.


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