IN1

IN4

IN3

IN2

nENBL

OUT1

OUT2

OUT3

OUT4

DRV8803

www.ti.com

SLVSAW5A

– JULY 2011 – REVISED JULY 2011

FUNCTIONAL DESCRIPTION

Output Drivers

The DRV8803 contains four protected low-side drivers. Each output has an integrated clamp diode connected to

a common pin, VCLAMP.

VCLAMP can be connected to the main power supply voltage, VM. It can also be connected to a zener or TVS

diode to VM, allowing the switch voltage to exceed the main supply voltage VM. This connection can be

beneficial when driving loads that require very fast current decay, such as unipolar stepper motors.

In all cases, the voltage on the outputs must not be allowed to exceed the maximum output voltage specification.

Parallel Interface Operation

The DRV8803 is controlled with a simple parallel interface. Logically, the interface is shown in Figure 2.

Figure 2. Parallel Interface Operation

nENBL and RESET Operation

The nENBL pin enables or disables the output drivers. nENBL must be low to enable the outputs. Note that

nENBL has an internal pulldown.

The RESET pin, when driven active high, resets internal logic. All inputs are ignored while RESET is active. Note

that RESET has an internal pulldown. An internal power-up reset is also provided, so it is not required to drive

RESET at power-up.

Copyright

© 2011, Texas Instruments Incorporated

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Product Folder Link(s): DRV8803