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PC312XDP512F0CFVR Fiches technique(PDF) 486 Page - Freescale Semiconductor, Inc |
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PC312XDP512F0CFVR Fiches technique(HTML) 486 Page - Freescale Semiconductor, Inc |
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486 / 1348 page ![]() Chapter 11 Serial Communication Interface (S12SCIV5) MC9S12XDP512 Data Sheet, Rev. 2.21 486 Freescale Semiconductor 11.3.2.4 SCI Alternative Control Register 1 (SCIACR1) Read: Anytime, if AMAP = 1 Write: Anytime, if AMAP = 1 76543210 R RXEDGIE 00000 BERRIE BKDIE W Reset 00000000 = Unimplemented or Reserved Figure 11-7. SCI Alternative Control Register 1 (SCIACR1) Table 11-6. SCIACR1 Field Descriptions Field Description 7 RSEDGIE Receive Input Active Edge Interrupt Enable — RXEDGIE enables the receive input active edge interrupt flag, RXEDGIF, to generate interrupt requests. 0 RXEDGIF interrupt requests disabled 1 RXEDGIF interrupt requests enabled 1 BERRIE Bit Error Interrupt Enable — BERRIE enables the bit error interrupt flag, BERRIF, to generate interrupt requests. 0 BERRIF interrupt requests disabled 1 BERRIF interrupt requests enabled 0 BKDIE Break Detect Interrupt Enable — BKDIE enables the break detect interrupt flag, BKDIF, to generate interrupt requests. 0 BKDIF interrupt requests disabled 1 BKDIF interrupt requests enabled |
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