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PC912XDP512F0CFVR Fiches technique(PDF) 228 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0CFVR Fiches technique(HTML) 228 Page - Freescale Semiconductor, Inc |
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228 / 1348 page ![]() Chapter 6 XGATE (S12XGATEV2) MC9S12XDP512 Data Sheet, Rev. 2.21 228 Freescale Semiconductor Operation FirstOne (RS) ⇒ RD; Searches the first “1” in register RS (from MSB to LSB) and writes the bit position into the destination register RD. The upper bits of RD are cleared. In case the content of RS is equal to $0000, RD will be cleared and the carry flag will be set. This is used to distinguish a “1” in position 0 versus no “1” in the whole RS register at all. CCR Effects Code and CPU Cycles BFFO Bit Field Find First One BFFO NZ V C 0 ∆ 0 ∆ N: 0; cleared. Z: Set if the result is $0000; cleared otherwise. V: 0; cleared. C: Set if RS = $00001; cleared otherwise. 1 Before executing the instruction Source Form Address Mode Machine Code Cycles BFFO RD, RS DYA 0 0 0 0 1 RD RS 1 0 0 0 0 P |
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