74ALVC164245 datasheet(11/20 Pages) NXP

No de pièce	74ALVC164245

Description	16-bit dual supply translating transceiver; 3-state

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74ALVC164245_5

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Product data sheet

Rev. 05 — 13 April 2010

11 of 20

NXP Semiconductors

74ALVC164245

16-bit dual supply translating transceiver; 3-state

[1]

All typical values are measured at nominal voltage for VCC(B) and VCC(A) and at Tamb =25 °C.

[2]

tpd is the same as tPLH and tPHL.

ten is the same as tPZL and tPZH.

tdis is the same as tPLZ and tPHZ.

[3]

CPD is used to determine the dynamic power dissipation (PD in μW).

PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

Σ(C

L × VCC

2

× f

o) = sum of outputs.

[4]

The condition is VI = GND to VCC.

11. AC waveforms

CPD

power

dissipation

capacitance

5 V port: nAn to nBn;

VCC(B) = 5 V; VCC(A) = 3.3 V

[3][4]

outputs enabled

-

30

-

pF

outputs disabled

-

15

-

pF

3 V port: nBn to nAn;

VCC(B) = 5 V; VCC(A) = 3.3 V

[3][4]

outputs enabled

-

40

-

pF

outputs disabled

-

5

-

pF

Table 7.

Dynamic characteristics …continued

GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF; for test circuit see Figure 7.

Symbol Parameter

Conditions

Tamb = −40 °C to +85 °C

Tamb = −40 °C to +125 °C Unit

Min

Typ[1]

Max

Min

Max

Measurement points are given in Table 8.

VOL and VOH are typical output voltage levels that occur with the output load.

Fig 5.

Input (nAn, nBn) to output (nBn, nAn) propagation delays

001aaa792

nAn, nBn

input

nBn, nAn

output

tPHL

tPLH

GND

VI

VM

VOH

VOL

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