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M38044FFHKP Fiches technique(PDF) 235 Page - Renesas Technology Corp

No de pièce M38044FFHKP
Description  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  387 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M38044FFHKP Fiches technique(HTML) 235 Page - Renesas Technology Corp

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2-111
APPLICATION
2.5 Multi-master I2C-BUS interface
Rev.1.00 Jan 14, 2004
REJ09B0212-0100Z
3804 Group (Spec.H)
➃ Transmission of lower data
Before transmitting the upper data, restart to transmit the data at ➃ and confirm correct completion
of transmission of the lower data set in the slave address reception interrupt.
After that, transmit the upper data.
Fig. 2.5.32 Transmission process of lower data
End
S0 (address 001116)
←Upper data
Error end
0 (ACK)
LRB (address 001316), bit 0 ?
1(NACK)
PIN (address 001316), bit 4 ?
1 (STOP condition)
0 (lower data transmission completed)
4
S1 (address 001316)
← 000100002
• Judgment of bus hold
• ACK confirmation
• Slave receive mode set
• Output upper data write to I2C data shift register



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