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HD64F2149YV Fiches technique(PDF) 412 Page - Renesas Technology Corp |
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HD64F2149YV Fiches technique(HTML) 412 Page - Renesas Technology Corp |
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412 / 1075 page ![]() Section 13 Timer Connection Rev. 3.00 Jan 18, 2006 page 384 of 1044 REJ09B0280-0300 13.1.4 Register Configuration Table 13.2 lists the timer connection registers. Timer connection registers can only be accessed when the HIE bit in SYSCR is 0. Table 13.2 Register Configuration Name Abbreviation R/W Initial Value Address* 1 Timer connection register I TCONRI R/W H'00 H'FFFC Timer connection register O TCONRO R/W H'00 H'FFFD Timer connection register S TCONRS R/W H'00 H'FFFE Edge sense register SEDGR R/(W)* 2 H'00* 3 H'FFFF Module stop control register MSTPRH R/W H'3F H'FF86 MSTPRL R/W H'FF H'FF87 Notes: 1. Lower 16 bits of the address. 2. Bits 7 to 2: Only 0 can be written, to clear the flags. 3. Bits 1 and 0: Undefined (reflect the pin states). 13.2 Register Descriptions 13.2.1 Timer Connection Register I (TCONRI) Bit Initial value Read/Write 7 SIMOD1 0 R/W 6 SIMOD0 0 R/W 5 SCONE 0 R/W 4 ICST 0 R/W 3 HFINV 0 R/W 0 VIINV 0 R/W 2 VFINV 0 R/W 1 HIINV 0 R/W TCONRI is an 8-bit readable/writable register that controls connection between timers, the signal source for synchronization signal input, phase inversion, etc. TCONR1 is initialized to H'00 by a reset and in hardware standby mode. |
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