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HD64F2149YV Fiches technique(PDF) 366 Page - Renesas Technology Corp |
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HD64F2149YV Fiches technique(HTML) 366 Page - Renesas Technology Corp |
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366 / 1075 page ![]() Section 11 16-Bit Free-Running Timer Rev. 3.00 Jan 18, 2006 page 338 of 1044 REJ09B0280-0300 11.5 Sample Application In the example below, the free-running timer is used to generate pulse outputs with a 50% duty cycle and arbitrary phase relationship. The programming is as follows: • The CCLRA bit in TCSR is set to 1. • Each time a compare-match interrupt occurs, software inverts the corresponding output level bit in TOCR (OLVLA or OLVLB). FRC Counter clear H'FFFF OCRA OCRB H'0000 FTOA FTOB Figure 11.17 Pulse Output (Example) |
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