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HD64F2149YV Fiches technique(PDF) 361 Page - Renesas Technology Corp

No de pièce HD64F2149YV
Description  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2149YV Fiches technique(HTML) 361 Page - Renesas Technology Corp

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Section 11 16-Bit Free-Running Timer
Rev. 3.00 Jan 18, 2006 page 333 of 1044
REJ09B0280-0300
11.3.5
Timing of Input Capture Flag (ICFA to ICFD) Setting
The input capture flag ICFx (x = A to D) is set to 1 by the internal input capture signal. The FRC
value is simultaneously transferred to the corresponding input capture register (ICRx). Figure
11.11 shows the timing of this operation.
ICFA/B/C/D
φ
FRC
Input capture
signal
N
N
ICRA/B/C/D
Figure 11.11 Setting of Input Capture Flag (ICFA/B/C/D)



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