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H838532H Fiches technique(PDF) 292 Page - Renesas Technology Corp |
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H838532H Fiches technique(HTML) 292 Page - Renesas Technology Corp |
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292 / 508 page ![]() Section 9 Timers Rev. 1.00 May 30, 2008 Page 272 of 484 REJ09B0436-0100 H'F8 TCW overflow Start H'F8 written in TCW H'F8 written in TCW Reset Internal reset signal 512 φOSC clock cycles H'FF H'00 TCW count value Example: φ = 2 MHz and the desired overflow period is 30 ms. 2 × 106 8192 The value set in TCW should therefore be 256 − 8 = 248 (H'F8). × 30 × 10–3 = 7.3 Figure 9.18 Typical Watchdog Timer Operations (Example) 9.6.4 Watchdog Timer Operation States Table 9.18 summarizes the watchdog timer operation states. Table 9.18 Watchdog Timer Operation States Operation Mode Reset Active Sleep Watch Sub- active Sub- sleep Standby Module Standby TCW Reset Functions Functions Halted Functions/ Halted* Halted Halted Halted TCSRW Reset Functions Functions Retained Functions/ Halted* Retained Retained Retained Note: * Functions when φw/32 is selected as the input clock. |
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