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H838532H Fiches technique(PDF) 152 Page - Renesas Technology Corp

No de pièce H838532H
Description  16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series
PDF  508 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H838532H Fiches technique(HTML) 152 Page - Renesas Technology Corp

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Section 6 ROM
Rev. 1.00 May 30, 2008 Page 132 of 484
REJ09B0436-0100
6.3.5
Flash Memory Enable Register (FENR)
Bit
Initial value
Read/Write
7
FLSHE
0
R/W
6
—
0
—
5
—
0
—
4
—
0
—
3
—
0
—
0
—
0
—
2
—
0
—
1
—
0
—
FENR controls CPU access to the flash memory control registers, FLMCR1, FLMCR2, EBR, and
FLPWCR.
Bit 7—Flash Memory Control Register Enable (FLSHE)
This bit controls access to the flash memory control registers.
Bit 7
FLSHE
Description
0
Flash memory control registers cannot be accessed
(initial value)
1
Flash memory control registers can be accessed
Bits 6 to 0—Reserved
These bits are always read as 0 and cannot be modified.



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