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IS25LEG-RLLA2:P-TY Fiches technique(PDF) 114 Page - Integrated Silicon Solution, Inc

No de pièce IS25LEG-RLLA2:P-TY
Description  SERIAL FLASH MEMORY 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  193 Pages
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Fabricant  ISSI [Integrated Silicon Solution, Inc]
Site Internet  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LEG-RLLA2:P-TY Fiches technique(HTML) 114 Page - Integrated Silicon Solution, Inc

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IS25LE01GG
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Integrated Silicon Solution, Inc.- www.issi.com
114
Rev. A3
10/02/2025
8.31 CLEAR EXTENDED READ REGISTER OPERATION (CLERP, 82h)
A Clear Extended Read Register (CLERP) instruction clears PROT_E, P_ERR, and E_ERR error bits in the
Extended Read Register to “0” when the error bits are set to “1”. Once the error bits are set to “1”, they remains set
to “1” until they are cleared to “0” with a CLERP command.
Figure 8.68 Clear Extended Read Register Sequence In SPI Mode
Instruction = 82h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.69 Clear Extended Read Register Sequence In QPI Mode
82h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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