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STM32F412RGH7P Fiches technique(PDF) 162 Page - STMicroelectronics

No de pièce STM32F412RGH7P
Description  Arm®-Cortex®-M4 32b MCUFPU, 125 DMIPS, 1MB Flash, 256KB RAM, USB OTG FS, 17 TIMs, 1 ADC, 17 comm. interfaces
PDF  201 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F412RGH7P Fiches technique(HTML) 162 Page - STMicroelectronics

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Electrical characteristics
STM32F412xE/G
162/201
DocID028087 Rev 7
Figure 56. Synchronous non-multiplexed NOR/PSRAM read timings
Table 94. Synchronous non-multiplexed NOR/PSRAM read timings(1)(2)
Symbol
Parameter
Min
Max
Unit
tw(CLK)
FSMC_CLK period
2THCLK – 0.5
-
ns
t(CLKL-NExL)
FSMC_CLK low to FSMC_NEx low (x=0..2)
-
1
td(CLKH-NExH) FSMC_CLK high to FSMC_NEx high (x= 0…2)
THCLK +0.5
-
td(CLKL-NADVL) FSMC_CLK low to FSMC_NADV low
-
1
td(CLKL-NADVH) FSMC_CLK low to FSMC_NADV high
0
-
td(CLKL-AV)
FSMC_CLK low to FSMC_Ax valid (x=16…25)
-
2
td(CLKH-AIV)
FSMC_CLK high to FSMC_Ax invalid (x=16…25)
THCLK
-
td(CLKL-NOEL) FSMC_CLK low to FSMC_NOE low
-
1.5
td(CLKH-NOEH) FSMC_CLK high to FSMC_NOE high
THCLK
-
tsu(DV-CLKH)
FSMC_D[15:0] valid data before FSMC_CLK
high
1
-
th(CLKH-DV)
FSMC_D[15:0] valid data after FSMC_CLK high
2
-
tsu(NWAIT-CLKH) FSMC_NWAIT valid before FSMC_CLK high
2
-
th(CLKH-NWAIT) FSMC_NWAIT valid after FSMC_CLK high
2
-



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