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LAN9252/ML Fiches technique(PDF) 229 Page - Microchip Technology |
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LAN9252/ML Fiches technique(HTML) 229 Page - Microchip Technology |
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229 / 329 page ![]() 2015 Microchip Technology Inc. DS00001909A-page 229 LAN9252 12.14.7 PORT DESCRIPTOR REGISTER Offset: 0007h Size: 8 bits Bits Description ECAT Type PDI Type Default 7:6 Port 3 Configuration This field details the Port 3 configuration. 00: Not implemented 01: Not configured 10: EBUS 11: MII/RMII RO RO 00b 5:4 Port 2 Configuration This field details the Port 2 configuration. 00: Not implemented 01: Not configured 10: EBUS 11: MII/RMII RO RO 11b (3-port operation) 01b (2-port operation) See Section 14.0 “Chip Mode Configuration” 3:2 Port 1 Configuration This field details the Port 1 configuration. 00: Not implemented 01: Not configured 10: EBUS 11: MII/RMII RO RO 11b 1:0 Port 0 Configuration This field details the Port 0 configuration. 00: Not implemented 01: Not configured 10: EBUS 11: MII/RMII RO RO 11b |
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