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ST7L15 Fiches technique(PDF) 101 Page - STMicroelectronics |
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ST7L15 Fiches technique(HTML) 101 Page - STMicroelectronics |
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101 / 138 page ![]() ST7L15, ST7L19 101/138 OPERATING CONDITIONS (cont’d) The RC oscillator and PLL characteristics are temperature-dependent. 13.3.1.1 Operating Conditions (tested for TA = -40 to +125°C) @ VDD = 4.5 to 5.5V Notes: 1. If the RC oscillator clock is selected, to improve clock stability and frequency accuracy, it is recommended to place a decoupling capacitor, typically 100nF, between the VDD and VSS pins as close as possible to the ST7 device. 2. See “INTERNAL RC OSCILLATOR ADJUSTMENT” on page 21. 3. Minimum value is obtained for hot temperature and max value is obtained for cold temperature. 4. Data based on characterization results, not tested in production 5. Measurement made with RC calibrated at 1 MHz. 6. Guaranteed by design. 7. Averaged over a 4ms period. After the LOCKED bit is set, a period of tSTAB is required to reach ACCPLL accuracy. 8. After the LOCKED bit is set ACCPLL is maximum 10% until tSTAB has elapsed. See Figure 11 on page 22. Figure 61. Typical Accuracy with RCCR = RCCR0 vs VDD = 4.5 to 5.5V and Temperature Symbol Parameter Conditions Min Typ Max Unit fRC 1) Internal RC oscillator frequency RCCR = FF (reset value), TA = 25°C, VDD = 5V 700 kHz RCCR = RCCR02 ), TA = 25°C, VDD = 5V 992 1000 1008 ACCRC Accuracy of Internal RC oscillator with RCCR = RCCR02)3) TA = 25°C, VDD = 5V -0.8 +0.8 % TA = 25°C, VDD = 4.5 to 5.5V 4) -1 +1 TA = -40 to +125°C, VDD = 4.5 to 5.5V 4) -3.5 +7 IDD(RC) RC oscillator current consumption TA = 25°C, VDD =5V 6004)5) µA tsu(RC) RC oscillator setup time 102) µs fPLL x8 PLL input clock 1MHz tLOCK PLL Lock time8) 2 ms tSTAB PLL Stabilization time8) 4 ACCPLL x8 PLL Accuracy fRC =1 MHz @ TA = 25°C, VDD = 4.5 to 5.5V 4) 0.17) % fRC =1 MHz @ TA = -40 to +125°C, VDD =5V 0.17) JITPLL PLL jitter ( ∆f CPU/fCPU)1 6) IDD(PLL) PLL current consumption TA = 25°C 6004) µA -1.00% -0.50% 0.00% 0.50% 1.00% 1.50% 2.00% 2.50% 3.00% 3.50% 4.5 4.6 4.7 4.8 4.9 5 5.1 5.2 5.3 5.4 5.5 Vdd (V) -45 -10 0 25 90 110 130 |
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